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1. 與清大鄭桂忠、羅中泉、謝志成及呂仁碩教授合作
投稿論文" A 0.8V Multi-Mode Vision Sensor for Motion and Saliency Detection with Ping-Pong PWM Pixel"
2. 張彤誠李俊穎邱硯晟洪哲民張廣唐薛承昕吳思妍黃筱喻鄧士新同學
投稿論文" A 22nm 1Mb 1024b-Read and Near-Memory-Computing Dual-Mode STT-MRAM Macro with 42.6GB/s Read-Bandwidth for Security Aware Mobile Devices"
3. 與北京清華劉勇攀實驗室合作
張志曉司鑫劉汝暉同學
投稿論文"A 65nm Computing-in-Memory Based CNN Processor with 2.9-35.8TOP/W System Energy Efficiency Using Dynamic Sparsity Performance Scaling Architecture and Energy Efficient Inter/Intra Macro Data Reuse "
4. 與工業技術研究院、佐治亞理工學院與清大鄭桂忠、謝志成及呂仁碩教授合作
蘇建維司鑫周晏圻張廷瑋黃維新涂詠甯劉汝暉盧姵容劉大維王景鴻張志曉同學
投稿論文" A 28nm 64Kb Inference-Training Two-Way Transpose Multibit 6T SRAM Computing-in-Memory Macro for AI Edge Chips"
5. 薛承昕黃宗源劉哲旭張廷瑋高暉曜王景鴻劉大維魏士穎黃聖博同學
投稿論文" A 22nm 2Mb ReRAM Computing-in-Memory Macro with 121-28 TOPS/W for Multibit MAC Computing for Tiny AI Edge Devices"
6. 與成都電子科技大學、円星科技與清大鄭桂忠、羅中泉、謝志成及呂仁碩教授合作
司鑫涂詠甯黃維新蘇建維王景鴻吳思妍劉大維劉汝暉盧姵容周晏圻張志曉同學
投稿論文" A 28nm 64Kb 6T SRAM Computing-in-Memory Macro with 8-bit MAC Operation for AI Edge Chips"
7. 與北京清華錢鶴、吳華強實驗室合作
陳韋豪薛承昕魏士穎同學
投稿論文"A Fully-Integrated Analog ReRAM based 78.4 TOPS/W Computing-In-Memory Chip with Fully-Parallel MAC Computing"

!!恭賀!! 本實驗室入選 Nature Electronics - (1/266 全球電機電子領域最高影響因子之期刊)

投稿論文"CMOS-integrated memristive non-volatile computing-in-memory for AI edge processors"
"Wei-Hao Chen, Chunmeng Dou, Kai-Xiang Li, Wei-Yu Lin, Pin-Yi Li, Jian-Hao Huang, Jing-Hong Wang, Wei-Chen Wei, Cheng-Xin Xue, Yen-Cheng Chiu, Ya-Chin King, Chorng-Jung Lin, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, J. Joshua Yang, Mon-Shu Ho & Meng-Fan Chang "

!!恭賀!! 本實驗室入選四篇 2019 ISSCC

1. 與清大鄭桂忠、羅中泉、謝志成、金雅琴、林崇榮、呂仁碩、麻省大學Amherst J. Joshua Yang及中興何孟書教授合作
薛承昕陳韋豪劉哲旭李佳芳林威宇林暐恩張廷瑋張彤誠黃宗源高暉曜魏士穎邱硯晟李俊穎同學
投稿論文"A 1Mb Multibit ReRAM Computing-In-Memory Macro with 14.6ns Parallel MAC Computing Time for CNN-Based AI Edge Processors"
2. 與成都電子科技大學、亞利桑那州立大學、佐治亞理工學院與清大鄭桂忠、謝志成及呂仁碩教授合作
司鑫陳嘉璟涂詠甯黃維新王景鴻吳思妍同學
投稿論文" A Twin-8T SRAM Computation-In-Memory Macro for Multiple-Bit CNN-Based Machine Learning"
3. 與北京清華劉勇攀實驗室合作
陳韋豪張廷瑋林暐恩同學
投稿論文"A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source with <6×10-6 Native Bit Error Rate "
4. 與北京清華劉勇攀實驗室合作
涂詠甯陳奕儒同學
投稿論文"A 65nm 0.39-to-140.3TOPS/W 1-to-12b Unified Neural-Network Processor Using Block-Circulant-Enabled Transpose-Domain Acceleration with 8.1× Higher TOPS/mm2 and 6T HBST-TRAM-Based 2D Data-Reuse Architecture"

!!恭賀!! 本實驗室入選三篇 2018 ISSCC

1. 楊子賢李鎧翔姜彥寧林威宇林煥庭同學
投稿論文" A 28nm 32Kb embedded 2T2MTJ STT-MRAM macro with 1.3ns read-access time for fast and reliable read applications"
2. 與ASU Shimeng Yu教授實驗室合作
柯文昇司鑫陳嘉璟李佳芳同學
投稿論文"A A 65nm 4Kb algorithm-dependent computing-in-memory SRAM unit-macro with 2.3ns and 55.8TOPS/W fully parallel product-sum operation for binary DNN edge processors"
3. 與清大鄭桂忠、謝志成、金雅琴、林崇榮及呂仁碩教授合作
陳韋豪薛承昕李鎧翔徐國翔林威宇同學
投稿論文" A 65nm 1Mb nonvolatile computing-in-memory ReRAM macro with sub-16ns multiply-and-accumulate for binary DNN AI edge processors"

!!恭賀!! 陳韋豪、徐國翔、李峻毅及邱曉昀同學獲得 2017年第十七屆旺宏金矽獎--設計組--評審團金獎

!!恭賀!! 與北京清華劉勇攀實驗室合作入選 2017 Symposium on VLSI Technology
陳韋豪羅介甫徐國翔李峻毅同學
投稿論文"Energy-Efficient A 462GOPs/J RRAM-based nonvolatile intelligent processor for energy harvesting IoE system featuring nonvolatile logics and processing-in-memory"

!!恭賀!! 本實驗室入選三篇 2017 Symposium on VLSI Circuits

1. 與清大金雅琴、林崇榮教授合作

羅介甫林文章林威宇林煥庭楊子賢姜彥寧同學
投稿論文" Embedded 2Mb ReRAM macro with 2.6ns read access time using dynamic-trip-point-mismatch sampling current-mode sense amplifier for IoE applications"
2. 與北京清華劉勇攀教授實驗室合作
投稿論文" A 130nm FeRAM-based parallel recovery nonvolatile SOC for normally-OFF operations with 3.9× faster running speed and 11× higher energy efficiency using fast power-on detection and nonvolatile radio controller"
3. 與北京清華劉勇攀教授實驗室合作
陳韋豪羅介甫徐國翔李峻毅同學
投稿論文" A 462GOPs/J RRAM-based nonvolatile intelligent processor for energy harvesting IoE system featuring nonvolatile logics and processing-in-memory "

!!恭賀!! 本實驗室入選三篇 2016 ISSCC

1. 林建呈洪睿瑜林文章羅介甫姜彥寧同學
投稿論文"A 256b-Wordlength ReRAM-Based TCAM with 1ns Search Time and 14× Improvement in FOM Using 2.5T1R Cell and Region-Splitter Sense Amplifier"
2. 與北京清華劉勇攀教授實驗室合作
李岳陞羅介甫林建呈同學
投稿論文"A 65nm ReRAM-Enabled Nonvolatile Processor with 6× Reduction in Restore Time and 4× Higher Clock Frequency Using Adaptive Data Retention and Self-Write-Termination Nonvolatile Logic"
3. 與旺宏電子合作
柯文昇同學
投稿論文"A Resistance Drift Compensation Scheme to Reduce MLC PCM Raw BER by Over 100X for Storage Class Memory Applications"

!!恭賀!! 與陳添福老師實驗室合作入選 2015 DAC
林建呈同學
投稿論文"Energy-Efficient Non-Volatile TCAM Search Engine Design Using Priority-Decision in Memory Technology for DPI"

!!恭賀!! 本實驗室入選兩篇 2015 ISSCC
1. 陳建甫同學
投稿論文"A 28nm 256Kb 6T-SRAM with 280mV Improvement in VMIN Using a Dual-Split-Control Assist Scheme"
2. 林建呈同學
投稿論文"A 3T1R Nonvolatile TCAM Using MLC ReRAM with Sub-1ns Search Time"

!!恭賀!! 本實驗室入選2014 Symposium on VLSI Circuits
黃莉悅、莊淨皓、郭家辰、陳建甫同學
投稿論文"ReRAM-based 4T2R nonvolatile TCAM with 7x NVM-stress reduction, and 4x improvement in speed-wordlength-capacity for normally-off instant-on filter-based search engines used in big-data processing"

!!恭賀!! 簡惇妃、劉彥辰及林鉦峻同學獲得 2014年第十四屆旺宏金矽獎--設計組--評審團銀獎

!!恭賀!! 黃莉悅、林建呈及李岳陞同學獲得 2014年第十四屆旺宏金矽獎--設計組--評審團銅獎

!!恭賀!! 本實驗室入選 2014 ISSCC
吳瑞仁、簡惇妃、劉彥辰、楊廷琹同學
投稿論文"Embedded 1Mb ReRAM in 28nm CMOS with 0.27-to-1V Read Using Swing-Sample-and-Couple Sense Amplifier and Self-Boost-Write-Termination Scheme"

!!恭賀!! 與鄭桂忠老師實驗室合作入選 2014 ISSCC
張庭豪同學
投稿論文"A 0.5V 1.27mW Nose-on-a-Chip for Rapid Diagnosis of Ventilator-associated Pneumonia"

!!恭賀!! 郭家辰、陳翊維、黃莉悅、張庭豪以及楊廷琹同學獲得第十三屆旺宏金矽獎--設計組--評審團銅獎

!!恭賀!! 本實驗室入選三篇2013 Symposium on VLSI Circuits
1. 楊宜山、郭耀仁、沈欣彰、徐若瑜同學
投稿論文"3D Stackable Vertical-Gate BE-SONOS NAND Flash with Layer-Aware Program-and-Read Schemes and Wave-Propagation Fail-Bit-Detection against Cross-Layer Process Variations"
2. 郭家辰同學
投稿論文"Area-Efficient Embedded RRAM Macros with Sub-5ns Random-Read-Access-Time Using Logic-Process Parasitic-BJT-Switch (0T1R) Cell and Read-Disturb-Free Temperature-Aware Current-Mode Read Scheme"
3.陳建甫、張庭豪、陳來福同學
投稿論文"A 210mV 7.3MHz 8T SRAM with Dual Data-Aware Write-Assists and Negative Read Wordline for High Cell-Stability, Speed and Area-Efficiency"

!!恭賀!! 本實驗室入選 2012 Symposium on VLSI Circuits
陳銘斌、陳來福同學
投稿論文"A 260mV L-shaped 7T SRAM with bit-line (BL) Swing expansion schemes based on boosted BL, asymmetric-VTH read-port, and offset cell VDD biasing techniques "

!!恭賀!! 黃宗賢同學於一年2個月獲得碩士學位

!!恭賀!! 邱必芬碩士畢業同學獲 UC Berkley 全額獎學金攻讀博士學位

!!恭賀!! 本實驗室入選 ISSCC 2012

吳哲維、郭家辰、楊書孟、林谷峰同學
投稿論文” A 0.5V 4Mb Logic-Process Compatible Embedded Resistive RAM (ReRAM) in 65nm CMOS Using Low-Voltage Current-Mode Sensing Scheme with 45ns Random Read Time”

!!恭賀!!本實驗室入選 兩篇2011 Symposium on VLSI Circuits

1. 陳炎輝同學

投稿論文“A 40nm Fully Functional SRAM with BL Swing and WL Pulse Measurement Scheme

for Eliminating a Need for Additional Sensing Tolerance Margins”

2. 吳威震同學

投稿論文” A Larger Stacked Layer Number Scalable TSV-based 3D-SRAM for

High-Performance Universal-Memory-Capacity 3D-IC Platforms”

!!恭賀!! 本實驗室入選 兩篇 ISSCC 2011
1. 沈欣彰、劉家驥同學
投稿論文"An offset tolerant current-sampling-based sense amplifier for sub-100nA-cell-current nonvolatile memory"
2. 林谷峰同學
投稿論文"A 4Mb embedded SLC Resistive-RAM macro with 7.2ns read-write random access time and 160ns MLC-access capability"

!!恭賀!! 邱必芬、林谷峰同學獲得 2011年第十屆旺宏金矽獎--設計組--評審團銅獎

!!恭賀!! 邱必芬同學於一年內獲得碩士學位

!!恭賀!! 邱必芬、林谷峰、吳哲維同學
投稿論文“A Low Store Energy, Low VDDmin, Nonvolatile 8T2R SRAM with 3D Stacked
RRAM Devices for Low Power Mobile Applications."
入選 2010 Symposium on VLSI Circuits

!!恭賀!! 吳瑞仁、陳炎輝、鄒柏瑋、陳建源、陳銘斌同學
投稿論文“A Large σVTH/VDD Tolerant ZigZag 8T SRAM with Area-Efficient Decoupled
Differential Sensing and Fast Write-Back Scheme"
入選 2010 Symposium on VLSI Circuits

!!恭賀!! 姜智荃同學於一年二個月內獲得碩士學位

!!恭賀!! 楊書孟、梁志瑋、姜智荃同學
投稿論文“A 0.29V embedded NAND-ROM in 90nm CMOS for ultra-low-voltage applications"
入選 ISSCC 2010

!!恭賀!! 吳瑞仁、陳冠廷同學
投稿論文 "A differential data aware power-supplied (D2AP) 8T SRAM cell with
expanded write/read stabilities for lower VDDmin applications"
入選 2009 Symposium on VLSI Circuits